MAKING FRIENDS WITH A FIELD PROGRAMMABLE GATE ARRAY
readable number on an LED display.
The 7447 chip is capable of decoding
and displaying four-bit data from 0 to
15. It has a few other interesting functions that aren't used in this project.
You can download the complete
datasheet from Fairchild
Semiconductor to find out about
these. See the table in Figure 3 for
the outputs by count. Note that logic
low turns the display LED on. If you
want to use a common cathode display turning on the LED with logic
high, you should replace the 7447
with a 7448. You'll also have to
change the way the resistors are
wired. For the 7448, the output lines
are connected straight to the LED
and are pulled up to + 5 VDC through
The last integrated circuit is the
7404 Hex Inverter. It has six inverters,
or "Not" gates. We'll only use four
inside the FPGA. An inverter has a
single input and a single output. If a
high level is on the input, a low level
is on the output. If a low is on the
input, a high is on the output. Four
inverters are connected to the outputs of the 7490 counter chip and
turn on the appropriate single LEDs
to display the binary representation
of the number on the seven-segment
display. In real life, the inverters are
necessary to insure that there is
enough current to drive the LEDs.
They shouldn't be necessary in the
FPGA circuit, but I included them for
the sake of practice and staying true
to the original design.
Now all you have to do is transfer
the logic portion of the original circuit
to the graphic editor as shown in the
screenshot in Figure 4 and breadboard the rest of the circuit. Start up
the MAX+PLUS software and call the
new project "counter." Open a new
graphic editor file by clicking <File>
and <New> on the menu bar. Once
the New File window opens, choose
the Graphic Editor file type with the
".gdf" file extension.
Next, save the blank file as
" counter.gdf" So you don't forget
later, hit <Ctrl + Shift + J> to set the
current project to the current file.
Figure 2. Counter schematic with debounce circuit.
Now you need to specify the FPGA
being used. Select <Assign>
<Device> on the menu bar. For
Device Family, select MAX7000S.
Clear the check mark for "Show Only
Fastest Speed Grades." Go to
"Devices" and select
"EPM7064SLC44-10" and click OK.
Right-click somewhere on the
blank file and select "Enter Symbol"
from the dropdown menu. Choose
the megafunction (MF) library and
then double-click on the 7447 file.
The chip should appear on the graphic editor screen. Do the same for the
7490 chip. You can choose the MF
library for the 7404 chip,as well but it
will only pop up a single "Not" gate
and you will have to do it three more
times to get the correct number of
inverters on the screen. You can also
copy the first inverter and paste three
more on the screen.
Now you need to enter the sym-
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