Design Entry Utilities). In this menu area, you'll find a
selection marked Assign Pins (Chipviewer). Starting
this process will launch the Chipviewer, which lets you
graphically assign input and output pins to device pins. I
set pins 61 and 62 as the inputs (B1 and B2, respectively)
and pins 70 and 71 for the sum and carry outputs.
Once the fit is complete, you can use the Configure
Device process to program the chip. If you build the circuit
in Figure 8, you'll be able to test the results of the adder.
You might wonder how to define an adder in a hardware definition language. There are several possibilities.
Both Verilog and VHDL allow you to define circuits using
combinations of primitive gates or by simply describing their
behavior. Verilog is very much like C, while VHDL is reminiscent of Ada. Both have their proponents, but I prefer Verilog.
All the details of Verilog or VHDL are outside the scope
of this article. However, just to give you the flavor, here's
one way to define a half adder in Verilog:
module half_adder (B0, B1, CARRY, SUM);
Circle #129 on the Reader Service Card.
Figure 8. Test circuit for the half adder.