erator is gated on by a high input signal,
but the modified symbol of (b) — in
which a little circle is added to the generator’s input — implies that this generator is gated on by a low input signal, etc.
Note that in practice the (a) generator
can be made to give the same action as
that of (b) by simply inserting an inverter stage between the IN terminal and
the input of the generator, as shown in
(c), so that a low input forces the
generator’s input high and gates it on.
This system of assertion-level logic
notation is, in fact, widely used in electronic logic symbology; some examples
of its use are shown in Figure 12, which
deals with mixed logic equivalents.
FIGURE 11. Pulse generators that can be gated-on by (a) logic 1 and (b,c) logic 0 inputs.
shown in Figure 12. Note in particular
that a normal AND gate can be
simulated by a NOR gate with both
inputs inverted, and that a normal OR
gate can be simulated by a NAND
gate with both inputs inverted, etc.
gate has four possible input assertion-level sets, i.e., both inputs active-high,
or both active-low, or one active-high
and one active-low, or vice versa.
Similarly, the gate’s output has two
possible assertion-levels (active-high or
active-low). Thus, a two-input AND or
OR gate has a total of eight possible
input/output assertion levels.
If Truth Tables are drawn up for all
16 possible AND and OR gate variations, it becomes apparent that each
AND gate variation has a mixed-logic
OR gate equivalent, and vice versa, as
Most logic gate circuits presented
in this five-part series show the gates
used as simple logic state detectors.
FIGURE 12. Mixed logic equivalents.
When assertion-level logic notation
is applied to a simple two-input AND or
OR gate, it can be quickly seen that the
FIGURE 13. Four basic types of
digital transmission gate, with their
two-input logic equivalents.
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