■ FIGURE 3. Toggle Flip-Flop.
■ FIGURE 4. Bi-stable Circuit.
segment display showing seconds. The high bit of this
counter drives the next counter in the chain: a divide-by-six counter showing tens-of-seconds. Following that is
another pair of counters: ÷ 6 and ÷ 10, showing minutes
and tens-of-minutes. A divide-by- 12 counter completes the
clock by showing hours.
The heart of this clock is the two transistor toggle
flip-flop shown in Figure 3. The bi-stable circuit in
Figure 4 will be used to explain the operation of the
Assume that transistor Q1 is in the off state. The
collector of Q1 is high impedance so Output A is pulled
high by R1. A current flows through R2 (current B) into
the base of Q2 switching Q2 “on” so Q2 conducts and
pulls output B to ground. No current flows through R3
(current A) so Q1 is off (which is the initial assumed state).
This is one of two stable conditions. The other stable
condition is Q1 on and Q2 off. Note that they both
cannot be on and they both cannot be off.
The clock is made of a collection of counters.
Counters made by a chain of n flip-flops result in binary
ripple counters capable of dividing by 2n. A four flip-flop
counter naturally counts from 0 to 15. To make it count
from 0 to 9, it needs some steering logic on the flip-flop
toggle inputs. Figure 5 shows four flip-flops, the logic, and
the internal clocks driving each flip-flop to make a divide-by- 10 counter.
Note that at count 9, the clock to the second flip-flop
is masked by the logic causing state 9 to transition to state
0, rather than state 10. One weakness of this approach is
that if the counter powers up into a state higher than 9, it
takes a few counts to get back on track.
Figure 6 is a divide-by- 10 counter transistor schematic
of the logic circuit; note the two diode OR gate and the
three transistor AND-OR gate.
The output of the counters is decoded into one-of-n,
It’s Toggle Time!
Assume the previous condition with
Q1 off and Q2 on. Output A is high;
current B is flowing into the base of Q2
so Q2 is on and output B is low. Imagine
that current B is somehow interrupted for
a moment. Q2 will turn off, output B will
start to be pulled high by R4, and current
A will start to flow through R3 and C2.
Q1 will tune on, pulling output A low.
The flip-flop has “flipped” to the other
state. In other words, it has “toggled.”
Consider Figure 3 again. The two
diodes connecting bases to the input
allow a short negative-going pulse to
“steal” the base current for a moment on
the falling edge of the input, causing the
flip-flop to toggle.
■ FIGURE 5. Divide-by- 10 Logic.
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