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MAKE THE PLL FREQUENCY
SYNTHESIZER WITH
ROL
BY DAN
GRAVATT
A frequency synthesizer (signal generator) is a device which generates a very stable
waveform at a user-selected frequency. They are very handy when you need such a
waveform as an input to another circuit such as an audio mixer, a radio transmitter, or
digital logic. This design is optimized for use with digital circuits but can easily be adapted
to audio or radio frequency applications. The short list of requirements I had for this
synthesizer included a wide frequency range (up to 30 MHz), small frequency steps
(1 kHz), high accuracy, 50% duty cycle output, and a simple user interface for selecting
the frequency. The end result (Figure 1) met all these requirements at a cost of around
$70 including the custom-made circuit board. There are some ready-made synthesizer
chips on the market including the LTC6904 — a neat little eight-pin device with an I2C
interface — but these didn’t have the frequency steps I wanted or had insufficient
accuracy.
Frequency Magic
A phase-locked loop (PLL) can be used for many
applications, including frequency multiplication. In a typical
30
September 2010
application, a PLL continually attempts to synchronize its
internal voltage-controlled oscillator (VCO) with an external
frequency applied to the PLL. A phase comparator in the PLL
compares the two frequencies and generates an error voltage
which is applied to the VCO to “lock” the VCO frequency
and phase to the external frequency and phase. This is a pretty
neat trick all by itself, but it becomes more interesting if we
place a frequency divider between the PLL’s VCO output and
its phase comparator input. This makes the phase comparator
think the VCO is oscillating much slower than the external
frequency, by a factor equal to the frequency division ratio.
The phase comparator then outputs an error voltage to the VCO
which raises its frequency to equal the external frequency
multiplied by the frequency division ratio. Once the PLL locks
onto this multiplied frequency, we have a very accurate
multiple of the external frequency with a 50% duty cycle.
Component Selection
I selected the 74HC4059 programmable divide-by-N
counter/divider to set the frequency division ratio for the
PLL. This chip can divide its input frequency by any
number up to 15,999 and has 16 frequency-setting “Jam”
inputs which are easily interfaced to a microcontroller.
I settled on using the CD74HC7046 PLL for this
project. This chip has a wide frequency range (up to 38
MHz), a good “lock” range, and also has a “lock detect”
■ FIGURE 1. The PLL-based synthesizer (top) in operation, with
frequency counter and oscilloscope measurements of its output.
