■ FIGURE 4. This is the peripheral pin
select output pin map. Basically, I/O pins
in the peripheral pin select system are
assigned the function associated with the
Output Function Number.
portal is essential.
To build our SPI portal, we must call
upon the PIC18F47J53’s peripheral pin
select feature. A typical host SPI portal
consists of an SDO pin, an SDI pin, and
an SCK pin. If more than one SPI slave
device is to be accessed by the SPI
master device, a fourth pin is designated
by the programmer to select a slave SPI
device. When you reference the SPI
portal in Schematic 1, keep in mind that
the PIC18F47J53 SPI I/O pins are true
with respect to the PIC18F47J53. That is,
the SDO is actually the PIC18F47J53’s
SPI output pin and the SDI is really the
PIC18F47J53’s SPI portal input line.
Again, I must use the language that
makes it clear to me and hopefully clear
for you. From the PIC18F47J53’s
perspective, consider the PIC18F47J53’s
SDO pin as Master Out Slave In (MOSI).
With that, the PIC18F47J53’s SDI pin
becomes Master In Slave Out (MISO).
The SPI lines of the slave devices are
labeled in Schematic 1 from the
PIC18F47J53’s perspective. Thus, the SPI
slave device inputs are connected to the
■ FIGURE 5. This is the peripheral pin
select input pin map. The register is tied to
a function. The contents of the register
assign the input function to the I/O pin that
matches the value held in the register.
microEngineering Labs, Inc.
for PIC® Microcontrollers
Professional Development Tools
With Accessories for $119.95:
December 2010 59