October 2013 23
1) Is Figure 3 only for the
transmitter? So, would a receiver near
the door be required in addition
2) Is the 555 timer used to turn
the transmitter on and off to
minimize the current it draws?
3) The schematic for the 555
timer is a little different from the ones
in my book. One thing that confuses
me is what is going on with the
CNTRL. It looks like it goes into R2.
It looks almost like a potentiometer
but without any arrow.
4) What is IC2P?
Thanks so much and sorry again
for the newbie questions.
— Andrew Martin
AYou came to the right place, Andrew. I love to answer questions so feel free to ask them any time.
1.) A communications system
requires both a transmitter and a
receiver. The distance that it will
work over depends on the transmitter
power, the efficiency of the antenna,
and the sensitivity of the receiver. In
this case, the transmitter is low power
(under 100 milliwatts) and the
distance is short, so an efficient
antenna is not required. I don’t know
what the sensitivity of the receiver is,
but it is usually measured in
2.) Yes, power = volts x amps. So,
if the voltage is zero part of the time,
the power is reduced. The shorter the
on time, the lower the power. Note
that the 555 is LMC555; this means it
is CMOS and low power.
The CMOS 555 runs on three
volts, but the bipolar 555 (LM555)
draws more current and doesn’t work
3.) My bad, I put the resistor too
close to the 555. Actually, the CNTRL
pin is not connected to anything.
4.) IC2P is a mistake; I must have
had an IC2 at one time and forgot to
remove the power pins. In my
schematic software, the power pins
can be moved so as to have an
I hope this helps. If not, just let
with two diodes and a resistor (R1,
D1, D2; see Figure 6). I don’t
know the value of R1, but it
doesn’t matter because the input
resistance of E1 is infinite until the
diodes conduct. The current in that
condition is a minor consideration.
The gain stage A1 is simulated by a
voltage controlled voltage source
E1. Before placing E1, I mirrored it
by clicking on the E3 symbol at the
upper right, then used ctrl-r twice
to rotate it.
The offset voltage is simulated
by a series voltage source V1 and
V2. I probably could have used just
one voltage source, but used two
for symmetry. Note that V2 is
rotated so that the two offsets add
and do not cancel. The bias current
is simulated with a shunt current
source. It can’t be in series because the infinite resistance
of E1 will try to produce an infinite voltage. The offset
voltage produced by the bias current is limited by the
impedance of the source.
I want the terminal node numbers to be the same as
the pin numbers of the IC. To do that, right-click on the
wire and select “label net” from the pop-up window.
E1 has to have a high gain; to set the gain, right-click
on the symbol and double-click on the “E” of value. Enter
the desired value; in this case, 1E7 (10000000). E1 has
infinite bandwidth but I want the model to be band
limited — similar to the actual device.
C1 and C2 are intended to do that; the initial value
was set at 1 PF, then adjusted by fiddle and fudge to
match the IC response. I might need capacitors across
R7 and R8, but I’ll wait and see.
My first attempt with only E1 to simulate A1 had
constant bandwidth regardless of gain. The typical op-amp
response is a constant gain-bandwidth product; to
simulate that, I figured that slew rate limiting was needed.
To simulate that, I used R9, C2, E4, and lowered the gain
of E1. The gain of E4 changes the bandwidth.
The result is close to 1 MHz bandwidth at unity
gain and 20 kHz bandwith at 60 dB gain; close enough
■ FIGURE 6.