DATA
Processing
In this article, I present
the logic circuit design of
the building blocks of the
SCAM device using
ispLEVER professional
design tools.
Using
SCAM( 4)
IMPLEMENTING SCAM:
Building the SCAM Basic Blocks
SCAM HIERARCHICAL
DESIGN REALIZATION
The SCAM is composed of three main blocks: the
controller (SCAMC), the data repository (SCAMD), and the
response block (SCAMR), as described in the first article of
this series.
In order to realize my design, I used ispLEVER
Schematic Editor to prepare the logic circuit schematics
for the building blocks of the SCAM. The process
started with designing the basic cell types representing
the bottom of the hierarchy. Figure 1 illustrates
those hierarchy cells denoted by "cam_cell,"
"delimiter_cell," "tag_cell," and "control_cell." A symbol
(representing a virtual logic device) was created for each
cell type using the ispLEVER Project Navigator process,
"Generate Symbolic Symbol" (see the right pane in
Figure 1).
The next level of the hierarchy is a compilation of
those cell types into blocks of cells. I used those symbols
to create a 10-bit SCAMC block named "complete_
control," representing the SCAMC. I also produced
"cam_element," representing a complete data word
composed of a
SCAMD and
SCAMR string of
■ FIGURE 1. The SCAM Building
Blocks in ispLEVER Project Navigator.
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January 2006
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