Signal
Description
External
Internal
NSo
1=No matching word found in previous words' Tag cells
0=At least one matching word found in previous words'
Tag cells
√
√
QBo
State of backward navigation line of current word linked
to previous word, and is used to link activity
to the current element delimiter word. It is disabled
if current word is an element delimiter word
√
√
WS
Word Select signal out of the Tag cell to each
delimiter and Data cell of this word
--
√
QFo
State of forward navigation line of current word linked
to next word, and is used to link activity to
the next element delimiter word. It is disabled if
current word is an element delimiter word
√
√
FSETo
Realizes forward navigation in conjunction with LNW.
Sets Tag cell of next word to 1 if current Tag is set to 1
[operating in Parallel Mode (MODE=1) or current Tag
is the top most set cell]
√
√
BSETo
Realizes backward navigation in conjunction with LPW.
Sets Tag cell of previous word to 1 if current Tag is set to
1 [operating in Parallel Mode (MODE=1) or current Tag
is the top most set cell]
√
√
C, Cn
Masked Comparand cell state outputs of this bit slice of
the SCAMC
[0,0] No comparison in this bit slice is done
[0,1] Compare cells in this bit slice with 1
[1,0] Compare cells in this bit slice with 0
--
√
READo
Aggregated state of this bit slice from SCAMC to the
first word in SCAMD or to next SCAM module or to
next words in current SCAM module
√
√
Mismatcho
Accumulated Mismatch results out of this bit in
current word
--
√
QEn
Inverted state of Element delimiter cell of current word
--
√
■ Table 2. Output Signals
Legend for the SCAM Chip
Building Blocks.
comprised of a single flip-flop and a few gates for
matching its state with the
masked Comparand. The
result of the matching is
passed on via "Mismatcho"
to the next cell in the data
word. The negated state of
this cell, "QEn," is passed
on to the Tag cell of
the same word to control
information propagating
from the next word or from
the previous word through
an Element delimiter word.
The symbol for the Element
delimiter cell is shown in
Figure 6. Figure 7 shows the
logic circuit of Structure and
Data cells. Its design is similar to that of the Element
delimiter cell and adds
some logic for passing on
the accumulated matching
result "Mismatchi" of previous cells in the data word to
the following cell (signal
■ FIGURE 2. Control Cell
schematic generated
by ispLEVER Schematic
Editor.
■ FIGURE 3. Control
Cell symbol generated
by ispLEVER Project
Navigator.
■ FIGURE 4. 10-Bit
SCAM Controller symbol
generated by ispLEVER
Project Navigator.
70
January 2006
