DATA
Processing
Using
In this article, I describe
how to assemble the SCAM
basic cell types, which I
developed using ispLEVER
Schematic Editor, into a full-fledged package using ABEL
hardware description
language and the ispLEVER
Project Navigator.
SCAM( 5)
IMPLEMENTING SCAM:
Assembling the Parts With ABEL
WHAT IS ABEL?
ABEL (Advanced Boolean Equation Language) is
a means of making behavior-like descriptions of a
logic circuit. ABEL is an industry standard hardware
description language (HDL) that was developed by Data
I/O Corporation for programmable logic devices (PLD).
There are other hardware description languages, such as
VHDL and Verilog. ABEL is a simpler language than
VHDL that is capable of describing systems of larger
complexity.
ABEL can be used to describe the behavior of a
system in a variety of forms, including logic equations,
truth tables, and state diagrams, using C-like statements.
The ABEL compiler allows designs to be simulated and
implemented into PLDs such as PALs, CPLDs, and
FPGAs.
An ABEL source file consists of the following
■ FIGURE 1. The SCAM elements:
Design Hierarchy in
ispLEVER Project Navigator. • Header, including Module,
B
56
y G
February 2006
a
m
a
l
A
l
i
L
a
b
i
b
