Nuts & Volts - September 2006

A Wide Range Period Counter/Totalizer

PARTS LIST

ITEM DESCRIPTION ITEM DESCRIPTION

❑ R1 22 kΩ ❑ U1 74HC132 quad NAND gate ❑ R2 820 Ω ❑ U2 74HC86 quad exclusive OR gate ❑ R3 22 kΩ ❑ U3, 6 74HCo8 quad AND gate ❑ R4, 5, 6 10 kΩ ❑ U4 74HC4538 dual monostable ❑ R7 10 MΩ ❑ U5 74HC74 dual D flipflop ❑ R8 100 Ω ❑ U7 74HC32 quad OR gate ❑ R9, 10, 11, 12, 13 10 kΩ ❑ U8, 9, 10, 11 74HC390 dual decade counter ❑ R14, 15, 16, 19 270 Ω ❑ U12 CD14543 four-digit display ctr,dec,drv (Jameco)

❑ R17, 18, 20 10 kΩ ❑ U14 ULN2003 npn inverters ❑ R21, 22 22 kΩ ❑ Xo 10 MHz ttl osc. (Mouser 520-TCH 1000)

❑ Xo 1 MHz ttl osc. (Mouser 520-TCH 100)

❑ S1,S2 SPDT toggle switch

❑ S3 Pushbutton switch NC

❑ S4 Rotary switch – four position

❑ RP1 14 DIP resistor, 100 Ω

❑ RP1 14 DIP resistor, 680 Ω

❑ Display #1 Four digit, 0.4 inch, multiplexed

(Digi-Key 160-1551-5-ND)

❑ Display #2 One digit, 0.4 inch (Digi-Key 160-1533-5-ND) ❑ Chassis 4OUB103 EPD (Mouser)

❑ C1

❑ C2, 3, 4

❑ C5

❑ C6, 7

❑ C8, 9

❑ D1 thru D8

68 pF 33 pF 0.1 mF 100 pF 1000 pF IN914

❑ LED1,2, 3

❑ LED4

❑ Q1,2, 3

10 mA red 10 mA yellow 2N3904

pulse triggers an identical circuit, U1C. This is the auto reset circuit. The output of this stage resets the counters to zero and readies them for the next measurement. For manual reset, this line is normally held high. When S3 is depressed, the line goes low, resets the auto reset circuit, and directly clears the main gate F/F through U3C, the holdoff mono. It also clears U5B (overflow latch) through C7. This same latch will also be cleared automatically when the half circuit times out through C6.

As mentioned before, while in a totalizing operation, a constant low is put on the manual reset line by S4 D action. This is needed to continuously latch through the count state from the counter. This presented a problem for manual reset because the reset line was already low! Once again, the exclusive OR gate, U2B, came to the rescue, allowing manual reset to occur regardless of which state that line is in.

There is just one more topic to cover before construction — the overflow circuitry. Without an overflow indicator, ambiguity becomes a problem. When U13 completely loads up the counters and goes into overflow condition, its carryout (P14) sends a signal to U11B, which acts as a sort of decoder.

The output of this stage operates a latch {U5B) to light the overflow LED from P9.

One other item that may have piqued your curiosity is the circuit associated with the decimal points. These points on the display are multiplexed with no provision to light them externally. This was quite annoying, and for that reason a decoder had to be added (Q2 and Q3) to light them at the proper time.

This about covers the theory of

operation; now onto construction. I built the display circuitry on a 1-1/4” x 5” perforated board. This board contains both displays, U11, U12, U13, U14, RP1, and RP2. I mounted the board behind the front panel on 3/8” standoffs such that it lined up to a 1/2” x 2-1/2” display window cut into the panel.