they are the same cost as 5% values (as
SMD resistors). Also, an error of 1% is
equivalent to only 0.09 db.
There are two procedures that must
be used to calibrate the ADC and the
FFT processing:
1) Measure the no-signal DC offset voltage.
You can do this by simply not activating K1
and not applying an input signal. Also, each
of the analog switches must be turned on so
that the gain of each of the three stages is
one. The voltage will be very close to 2.5V
and is subtracted from all the readings in
order to present the FFT algorithm with a
series of values centered on 0 volts — a
requirement of the algorithm. This ADC
value — that should be close to 2048 — is
stored into the configuration memory area.
Note that there is an adjustment
potentiometer for each of the gain circuits.
These are required due to the offset
voltages and currents of the op-amps. There
is a menu option that allows you to activate and
deactivate the analog switches so that you can use the
potentiometers to “balance” the output voltage to the
same value whether or not the switch is activated. When
■ FIGURE 4. The 22 kHz
low pass filter.
done, the voltage should be very close to +2.5V,
independent of the selected gain.
2) Measure the processed signal amplitude of a single
■ FIGURE 5. The digital
microprocessor section.
August 2008 47
