Nuts and Volts - August 2008

THE DESIGN CYCLE

■ PHOTO 1. This is the only Spartan-3A variant that is available in a pinned package. Only 144 pins. We can handle this.

executive view of the Xilinx programmable output block.

The direct output path looks very similar to our LUT output path. The output signal can be driven by a storage block or simply routed directly to the

FPGA output pin via the multiplexer and the three-state output driver. The tri-state output path is used to drive the three-state output driver’s output into high impedance mode. Note that programmable storage elements are present in both of the output paths. To complete the feature set offered by the Xilinx IOB, every signal path that enters an IOB has an associated programmable inverter option.

There’s one more basic thing you need to understand about FPGAs. When the lights go out, so does the FPGA program. Therefore, if we want our LEDs to blink every time we power up our FPGA hardware, we need to include some program storage for the FPGA to boot from. The FPGA program storage can be in the form of serially-interfaced (SPI) or parallel-interfaced memory. We can also get fancy and use a microcontroller to load an FPGA. We’ll be using the official Xilinx Platform Cable USB on the FPGA’s JTAG interface to download our FPGA designs. Using the FPGA JTAG interface for programming the FPGA also opens up the use of Xilinx’s JTAG-accessible Platform Flash as our FPGA boot memory element.

If you had the opportunity to participate in our past Design Cycle CPLD discussions, you’ll see that we are using the very same CPLD support equipment (platform cable USB programmer and ISE WebPACK software) to load our design logic into Xilinx FPGAs. The only thing we’re going to change is our programming language. Instead of using ABEL, we’re going to lay down our FPGA logic with Verilog. Before we start our Verilog coding, let’s take a quick look at the hardware target we’ll be working with.

■ PHOTO 2. We can handle this, too. This development board was intended to demonstrate the capabilities of the Spartan-3A FPGA family. We’re going to use it as a launch pad into FPGA space.

to need right now. However, the simple and necessary things we’re going to need here (like LEDs, pushbuttons, RS-232 interface circuitry, and an LCD) are included as subsystems in the kit. All we have to do to use the starter kit’s resources is map them into our FPGA application. The mapping is done within ISE WebPACK with the User Constraints Floorplan I/O utility.

As we progress through our FPGA projects, I am going to pull selected items from the Spartan-3A kit and associate them schematically with our Verilog code. If you want to see what the starter kit looks like as a whole from a schematic point of view, you can download the Spartan-3A Starter Kit schematic from the Xilinx

■ PHOTO 3. Although LEDs and switches are easy to manipulate with most any microcontroller, CPLD, or FPGA, we must pay attention to where they are best connected to their hosts. The LEDs are attached to high current FPGA outputs while the slide switches are connected to FPGA dedicated input pins. Note the FPGA pin locations I used to map the LEDs and switches into my Verilog code are silkscreened in parentheses.

THE XILINX SPARTAN-3A FPGA

Our goal is to build up some home-brew FPGA hardware using a Xilinx XC3S50A like the one you see in Photo 1. Since all of the members of the Spartan-3A family of FPGAs have identical basic characteristics, we can do our preliminary FPGA firmware and hardware design work on a prefabricated Spartan-3A-equipped demo board.