THE DESIGN CYCLE
■ SCREENSHOT 1. I captured
this waveform on the LED0
anode. As you can see,
our scan rate math is confirmed
on both sides of the center
of the waveform.
every rising edge of the 50 MHz
clock. Note also that the “=”
operator we used in our slide
switch code has been replaced
with “<=” in our counter code.
The “=” operator is called
a procedural blocking
assignment, which means that
statements that use it will
execute in the order of their
appearance. When blocking is
employed, the next statement
will not execute until the current statement execution has
completed. The “<=” operator is non-blocking. All
non-blocking statements execute in parallel. As the
non-blocking operator infers, the non-blocking statements
are evaluated right to left. Non-blocking operation closely
models a physical flip-flop and should be used in clocked
always loops. Blocking statements are best suited for
combinatorial logic like our slide switch code.
DUST OFF YOUR SOLDERING IRON
... because next time we’re going to build up our own
homebrewed XC3S50A FPGA hardware.
All of the Verilog code in this installment of Design
Cycle was written using Xilinx ISE WebPACK version
10.1.01, which is a free download from the Xilinx website.
I’ve stuffed all of the projects into a download package on
the Nuts & Volts website ( www.nutsvolts.com) so you can
run the FPGA projects just as we ran them here. You don’t
need any FPGA hardware to compile the project code.
I’ve included the entire project file set for both
projects so that you can look at all of the ISE WebPACK
options and settings. For instance, if you’re wondering
how I assigned FPGA pins to the LEDs and slide switches,
you can see how I did it by looking at the User
Constraints Floorplan I/O utility entries, which are
available from the ISE WebPACK Processes window.
With our FPGA projects verified on the Spartan-3A
starter kit, we now have some known-good test code we
can run on the XC3S50A hardware we’ll build up in the
next edition of Design Cycle. NV
CONTACT THE AUTHOR
■ Fred Eady can be contacted via email at firstname.lastname@example.org.
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August 2008 85