Nuts and Volts - September 2008

5V

1V2INT

C7 10uF

VR1

²IN OUT ⁴

¹EN

⁵BIAS

GND ³_C8

LM38855

1uF

C6 10uF

3V3AUX

VR2

²IN OUT ^4
1SD SENSE ⁵

C10 220uF

GND ³LM3872

+ C9

220uF

3V3IO

VR3

²IN OUT ^4
1SD SENSE ⁵

C12 220uF

GND ³LM3872

+ C11

220uF

design is formally specified as “-1.2” part, which is the 1.2 volt version in a TO-263 package.

The remaining XC3S50A 3. 3 volt power rails are generated using an LP3872. If you’re wondering why I

+ C5

220uF

■ SCHEMATIC 1. On paper, it doesn’t get much simpler than this. However, on the PCB, the geometry of the copper layout is very important as it directly affects the stability of the XC3S50A power supply system as a whole.

3V3IO

didn’t use an LP3872 for the 1.2 volt power rail, the answer can be found in the datasheet.

The minimum regulated voltage that the LP3872 can supply is 1.8 volts; 1.8 volts is great for a CoolRunner-II CPLD’s core but is just a tad high for our XC3S50A FPGA core. Like the LP38855, ^R1₃₉₀the LP3872 is just as picky about its capacitor complement. A minimum of 10 μF is required on the LP3872’s input and output pins. Its input and output capacitors can be tantalum, ceramic, or electrolytic as long as their ESR (equivalent series resistance) values fall into the LP3872’s specifications. Tantalum capacitors are recommended by its datasheet. So, guess what? I dropped in a couple of 220 μF tantalums for each 3. 3 volt LP3872 LDO voltage regulator. They can source up to 1.5 amperes and come with bells and whistles that we won’t use in our design this time. As you can see in Schematic 1,

I disabled the SHUTDOWN (SD) and ERROR/ SENSE (SENSE) features of the LP3872.

The LP3872 suggests that certain layout rules be followed to insure the stability of the power supply circuit. Its output capacitors should all lie within 1 cm of the

POWER

LED

■ SCREENSHOT 1. The LP3872 wants the output capacitors within 1 cm of the output pin. In addition, vias and internal copper planes are frowned upon and should not be used to connect the output capacitors to the LP3872 output pin.

■ SCREENSHOT 2. The ExpressPCB printed circuit board layout application allows us to partition the ground and power planes. Here, I’ve isolated the VCCINT, VCCAUX, and VCCO voltages and routed them to their FPGA and JTAG destinations.