32 MHz if our application demanded it. The 8 MHz clock
frequency will provide plenty of computational throughput
for our VDIP2 application. Recall that the VDIP2 will issue
an RTS signal to the PIC. So, RC0, which is the PIC's RTS
input, is set up as an input pin. The other PORTC input is
the RX (receive) line for the EUSART. Regardless of my
manual manipulation of the direction of the TX (RC6) and
RX (RC7) pins, the PIC18LF2620's EUSART automatically
sets the RC6 and RC7 pins for input or output as required.
The remaining PORTC pins are defined as follows:
//* VDIP2 I/O DEFINITIONS
#define pRTS LATC0
#define pCTS LATC1
#define pRST LATC2
//* LED DEFINITIONS
#define LED3
#define LED2
#define LED1
LATC3
LATC4
LATC5
The PORTC VDIP2 pin definitions include a p prefix
for the modem control signals and the VDIP2 reset pin.
LEDs occupy the remainder of the PORTC pins. I've
assigned LED1 as the heartbeat LED. The heartbeat LED
will flash at a rate of 1 Hz, indicating that the VDIP2 API
code is executing. The VDIP2 reset pin is a convenience
connection that you'll find very useful. Without the VDIP2
reset pin connection, you would have to power-down
and power-up the VDIP2 every time you made a change
to the PIC firmware. Right now, we have no use for
the PIC18LF2620's analog-to-digital (A-to-D) converter
module or the comparators. So, let's turn all of that
stuff off:
//*
CONFIGURE A2D AND COMPARATORS
ADCON1 = 0b00001111; // All digital I/O
ADON = 0; // ADC off
CMCON = 0x07; // comparators off
Since the EUSART is our desired means of communication with the VDIP2, we need to get the PIC18LF2620'
EUSART online as quickly as possible. Once the
PIC18LF2620's I/O ports are configured and the (A-to-D)
converter and comparators are disabled, the code within
the init() function fires up the PIC's EUSART with the
following function call:
//*
INITIALIZE EUSART
init_EUSART();
The code I use to service the PIC18LF2620's EUSART
is battle tested. All we have to do to put the interrupt-driven EUSART code to work for us is to specify a baud
rate in the EUSART initialization code:
//*
74
Init EUSART Function
January 2009
void init_EUSART(void) {
SPBRG = 51; // 8MHZ = 51 FOR 9600BAUD
TRISC7 = 1; // receive pin
TRISC6 = 0; // transmit pin
TXSTA = 0x04; // highspeed baud, BRGH = 1
RCSTA = 0x80; // enable serial portEUSART_RxTail = 0x00; //flush rx buffer
EUSART_RxHead = 0x00;
EUSART_TxTail = 0x00; //flush tx buffer
EUSART_TxHead = 0x00;
RCIP = 1; // rx interrupt = high pri
TXIP = 1; // tx interrupt = high pri
RCIE = 1; // enable rx interrupt
PEIE = 1; // enable all unmasked
// peripheral interrupts
// enable all unmasked ints
// enable EUSART1 receiver
// disable EUSART1 tx int
// transmitter enabled
GIE = 1;
CREN = 1;
TXIE = 0;
TXEN = 1;
}
Yep, I put my fingers on the TRIS (data direction) bits
of the EUSART's TX and RX pin yet again in the
init_EUSART() function. In reality, the TRISC7 and TRISC6
statements in the init_EUSART() function could probably
be eliminated. However, when something works as well
as this EUSART code has just as it is, leave it alone. In
addition to enabling the EUSART interrupt mechanism,
the code within the init_EUSART() function initializes the
transmit and receive buffer pointers which invalidates any
spurious data that resides in the buffers at power-up.
The EUSART transmit and receive buffer area is defined in
the code that follows:
//* EUSART BUFFER DEFINITIONS
//1,2,4,8,16,32,64,128 or 256 bytes
#define EUSART_RX_BUFFER_SIZE 256
#define EUSART_RX_BUFFER_MASK (
EUSART_RX_BUFFER_SIZE - 1 )
// 1,2,4,8,16,32,64,128 or 256 bytes
#define EUSART_TX_BUFFER_SIZE 256
#define EUSART_TX_BUFFER_MASK (
EUSART_TX_BUFFER_SIZE - 1 )
unsigned char
EUSART_RxBuf[EUSART_RX_BUFFER_SIZE],
EUSART_TxBuf[EUSART_TX_BUFFER_SIZE];
unsigned char EUSART_TxHead,EUSART_TxTail,
EUSART_RxHead,EUSART_RxTail;
I've set the transmit and receive buffer sizes at their
maximums of 256 bytes each. The transmit and receive
buffer masks are used to convert the EUSART buffer
spaces into a pair of circular buffers. The EUSART circular
transmit and receive buffers are serviced by an interrupt
mechanism called EUSART_TIMER1:
