Nuts and Volts - November 2010

SMILEY’S WORKSHOP ☺

■ FIGURE 2. Flip-flop Shift Register.

on one end as the serial in pin for the shift register and the output pin on the flip-flop on the other end as the serial data out pin. The Q# pins on each flip-flop hold the full eight-bit data state and can be read or written to for parallel I/O. Figure 3 shows a parallel byte of data — Q0 to Q7 — being latched into the register, then shifted out one bit at a time for each clock pulse while a new bit is clocked in. Unfortunately for Figure 3, I chose the same byte value (0x52) for both the parallel and serial I/O, and though it might have made a bit more sense to illustrate this with two different bytes, hopefully you’ll still get the general idea.

■ FIGURE 3. Shift Register Concepts.

Suggested Resources

If you want further information on shift registers, I suggest you read the Wikipedia sections on flip-flops and shift registers. If you want to REALLY understand these things, get the book Code by Charles Petzold. He starts with mechanical relays to recreate digital logic elements that could have been built in the 19th century and shows how the fundamental computer concepts could have been implemented even back then. His approach helps separate the ideas from the implementation which really helps you understand how to make logic machines.

You can clear the register by toggling the /MR, and you can shift out data at 100 MHz.

There are two registers: one for shifting serial bits and one for buffering the parallel output pins. Each register has its own clock; the serial being clocked by the SH_CP pin and the parallel by the ST_CP pin.

Both transfer data on the rising edge of the clock.

Figure 5 shows how bits are clocked into this device.

We use the 595 by presenting a bit of data on the serial data input pin 14 (DS) and then toggling the shift register clock input pin 11(SH_CP) as shown in Figure 5. We do this for the eight bits that we want to shift into the register, then we toggle the shift register clock input pin 12 (ST_CP) to cause the 595 to move the data from the serial shift register to the parallel output register. We can hook these in series so that the serial data output line pin 9 is connected to the next 595’s serial data input pin 14 (DS). The only difference is that we shift in 16 bits instead of eight as with the single 595.

Serial-In-Parallel-Out Shift Registers — the 74HC595

Parallel-In-Serial-Out Shift Registers — the 74HC597

The 74HC597 (whose pin-outs are shown in Figure 6)

The ‘595 — whose pin-out is shown in Figure 4 — is an eight-bit serial-in-parallel-out shift register IC available in a 16-pin DIP package [ www.nxp.com/documents/data_ sheet/74HC_HCT595.pdf]. The outputs can be in one of three states: VCC, GND, or disconnected (high impedance).