Nuts and Volts - November 2011

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DESIGN CYCLE

depend on the sophistication level of the UART. Nine-bit RS-232 messages are stretching out to the limits of the UART’s protocol capability. Where data buffering is concerned, most modern microcontroller UARTs contain circuitry that implements double buffering for incoming or outgoing bytes of data. Any additional buffering must be set up and monitored in the application programming, and resides in a chunk of SRAM allocated as buffer area. Designed to be a point-to-point protocol, RS-232 doesn’t warm up to the addressing of nodes and contains little (if any) native data filtering capability.

In addition to a protocol engine, the PIC32MX CAN module includes message acceptance filters and message assembly buffers. Incoming CAN messages are filtered by the message acceptance filters and masks. If the incoming CAN message meets the filter and mask requirements, the received messages can then be routed to the receive message assembly buffer. Conversely, an outgoing CAN message is assembled in the transmit message assembly buffer before being handed over to the protocol engine for transmission.

The PIC32MX CAN module contains absolutely zero buffer area. Like an extended RS-232 engine, all of the buffered data must reside within a block of preallocated SRAM. Unlike RS-232 — which needs supporting code to snatch and grab buffer data — the PIC32MX module can transfer data to and from the SRAM buffer area without any CPU intervention. In that controller area networks have been associated with automobiles, these easy-to-use networks have been underutilized in the embedded world. Microchip thought enough of CAN to include a couple of CAN engines in the 32-bit PIC32MX795F512L, and Digilent placed a pair of MCP2551 CAN transceivers on the chipKIT network shield. So, we’re going to show that we care and sling some code into the CAN.

4. FIFO Control Registers The PIC32MX module can be configured and activated by writing the correct bit patterns to each of the four sets of module registers. To that end, all of the registers have associated bit set and bit clear registers. The bit set and bit clear registers allow the individual bits within each config, interrupt, status, mask, filter, and FIFO register to be adjusted using a simple bit mask which is loaded into the target register’s associated bit set or bit clear register. To prevent us from twiddling ourselves into the bit bucket abyss, the Microchip CAN coders have provided an easy to use factory-approved PIC32MX CAN module peripheral library. This library allows the CAN programmer to literally “talk” his or her way through the configuration and operational aspects of the PIC32MX module. For instance, this is the bit-bang way to enable the CAN1 engine:

C1CONSET = 0x00008000; //set the ON bit
while(C1CONbits.CANBUSY == 1);
 //wait for operation to complete

I would rather enable CAN1 this way with the peripheral library call:

CANEnableModule(CAN1,TRUE);

The bit twiddling to push the CAN module into configuration mode isn’t bad if you know beforehand that REQOP and OPMOD are sets of three consecutive bits and what bit patterns they need to have loaded. If you decide to bring up your controller area network caveman style, you’ll need to carefully read Section 34 of the PIC32MX Family Reference Manual. Once you’ve done your homework, you won’t have any trouble writing the

BRINGING UP CAN2

■ SCHEMATIC 1. Wiring up an MCP2551 CAN transceiver is much easier than wiring up a MAX232 RS-232 converter.

As far as initialization is concerned, both CAN1 and CAN2 are coded identically. Since the CAN2 interface is not shared with other PIC32MX peripherals, we’ll concentrate our coding activity there. Activating CAN2 is a process that involves very intense bit twiddling among a number of 32-bit registers. The PIC32MX module registers can be corralled into four functional groups: