The chipKIT MX3’s PIC is clocked using an 8 MHz
crystal reference. Using the PIC32MX’s PLL, we multiply
the crystal reference by 20 and divide the result by two to
arrive at our 80 MHz MCU clock frequency. The MCU
peripheral clock is also moving along at 80 MHz. The
watchdog timer is disabled, as well as any code
protection.
One of the reasons I chose to go with a PIC32MX
part is the excellent library support. The inclusion of the
peripheral library allows a great deal of abstraction at the
register and register bit levels. The plibs come in handy
when manipulating peripherals like the SPI portals and
UARTs:
//***********************************************
//* CONFIGURATION BITS
//***********************************************
#pragma config FPLLMUL = MUL_20
// PLL Multiplier
#pragma config FPLLIDIV = DIV_2
// PLL Input Divider
#pragma config FPLLODIV = DIV_1
// PLL Output Divider
#pragma config FPBDIV = DIV_1
// Peripheral Clock divisor
#pragma config FWDTEN = OFF
// Watchdog Timer
#pragma config WDTPS = PS1
// Watchdog Timer Postscale
#pragma config FCKSM = CSDCMD
// Clk Switching & Fail Safe Clock
// Monitor
#pragma config OSCIOFNC = OFF
// CLKO Enable
#pragma config POSCMOD = HS
// Primary Oscillator
#pragma config IESO = OFF
// Internal/External Switch-over
#pragma config FSOSCEN = OFF
// Secondary Oscillator Enable
#pragma config FNOSC = PRIPLL
// Oscillator Selection
#pragma config CP = OFF
// Code Protect
#pragma config BWP = OFF
// Boot Flash Write Protect
#pragma config PWP = OFF
// Program Flash Write Protect
#pragma config ICESEL = ICS_PGx2
// ICE/ICD Comm Channel Select
//***********************************************
//* INCLUDES
//***********************************************
#include <xc.h>
#include <plib.h>
#include <stdlib.h>
#include <string.h>
#include <stdio.h>
#include “GenericTypeDefs.h”
■ Schematic 2. Nothing
changed on the JE
connector side. Only the
pins at the FT800's J5
header were moved.
Many peripherals such as the SPI portals and UARTs
need to know about the clock speeds. Knowledge of
clock speeds allows the peripherals to be set up to run at
those desired bit speeds. For instance, the FT800 wants to
see a SPI data stream running at 10 MHz or below at
startup. Once the FT800 is initialized, the SPI speed can
be increased three-fold.
Another very good reason I went with a 32-bit PIC
revolves around the ability to SET, CLEAR, and INVERT bits
within certain registers atomically. That’s a fancy way of
saying that it only takes one instruction cycle. We will use
the atomic bit manipulation feature whenever and
wherever we can. Here is how we will drive the SPI CS#
signal and the FT800 PD# signal using atomic operations:
//***********************************************
// I/O PIN ALIASES
//***********************************************
#define CSlo LATGCLR = 0x0200;
//0000 0010 0000 0000
#define CShi LATGSET = 0x0200;
#define PDlo LATBCLR = 0x0020;
//0000 0000 0010 0000
#define PDhi LATBSET = 0x0020;
//***********************************************
// chipKit MX3 LEDs
//***********************************************
#define LD4on LATFSET = 0x0001;
//0000 0000 0000 0001
#define LD4off LATFCLR = 0x0001;
#define LD4tog LATFINV = 0x0001;
#define LD5on LATFSET = 0x0002;
//0000 0000 0000 0010
#define LD5off LATFCLR = 0x0002;
Taking a look back at Schematics 1 and 2, you will
recall that we chose to assign the chipKIT MX3’s CS#
functionality to GPIO pin RG9. To drive CS# logically low,
we run the LATGCLR operation against the ninth bit of
72 June 2014
