//function
PDlo; //drive PD low
delayms(20); //wait 20mS
PDhi; //drive PD high
delayms(20);
//wait 20mS
hostCmd(ACTIVE);
//write 0x00 0x00 0x00
hostCmd(OSCEXT);
//write 0x44 0x00 0x00
hostCmd(PLL48);
//write 0x62 0x00 0x00
rd8(REG_ID);
//read addr 0x102400
if(readBuf[0] != 0x7C)
//did read return 0x7C?
{
do{
++scratch8;
}while(1);
}The aforementioned LCD panel settings can be
obtained from the LCD panel’s datasheet. Typical values
are shown in Table 6. As you can see, we used our
homegrown wr8 and wr16 functions to load the LCD
panel data.
Are We There Yet??
Yes, but we’re out of our allotted word space. So, I’ll
leave you with the code that produced the graphic details
you saw back in Photo 1:
wr16(REG_HCYCLE, 0x0224);
wr16(REG_HOFFSET, 43);
wr16(REG_HSYNC0, 0);
wr16(REG_HSYNC1, 41);
wr16(REG_VCYCLE, 292);
wr16(REG_VOFFSET, 12);
wr16(REG_VSYNC0, 0);
wr16(REG_VSYNC1, 10);
wr8(REG_SWIZZLE, 0);
wr8(REG_PCLK_POL, 1);
wr8(REG_CSPREAD, 1);
wr16(REG_HSIZE, 480);
wr16(REG_VSIZE, 272);
cmdBufRd = rd32(REG_CMD_READ);
cmdBufWr = rd32(REG_CMD_WRITE);
cmdOffset = cmdBufWr;
After the PD pin toggle operation, the hostCmd
function is used to send the ACTIVE command, which is
essentially three transmissions of 0x00.
cmd32(CMD_DLSTART);
cmd32(CLEAR_COLOR_RGB(0,0,0));
cmd32(CLEAR(1,1,1));
sprintf(txtBuf,”Design Cycle”);
drawText(106, 77, 31, 0,txtBuf);
Table 5 calls it CLKEXT, but the definition in the ft800-
pic32mx.h include file declares it OSCEXT. The OSCEXT
command enables the FT800 to recognize an external
crystal or clock source:
sprintf(btnMsg,”OK”);
drawButton(169, 139, 127, 55, 31, 0,btnMsg);
cmd32(DISPLAY());
cmd32(CMD_SWAP);
wr32(REG_CMD_WRITE,cmdOffset);
//Host Commands Contained Within ft800-pic32mx.h
#define OSCINT 0x48
#define OSCEXT 0x44
#define PLL48 0x62
#define PLL36 0x61
#define PLL24 0x64
#define ACTIVE 0x00
#define STANDBY 0x41
#define SLEEP 0x42
#define PWRDN 0x50
#define CORERST 0x68
wr8(REG_GPIO_DIR,(rd8(REG_GPIO_DIR)) | 0x80);
wr8(REG_GPIO,(rd8(REG_GPIO_DIR)) | 0x80);
wr8(REG_PCLK,5);
There are a few functions included in the display code
sequence that we still need to discuss. We will examine
the yet to be identified code I’ve presented in detail next
month. In the meantime, you may want to download the
The next step is to set the FT800 internal clock speed to
48 MHz using the PLL48 command. At this point, we can
optionally increase the speed of the SPI clock. In that we’re
learning to crawl, I’ve chosen to leave the SPI clock alone at
this time. We should now be able to read the REG_ID
register. If the read returns a 0x7C, we are walking in high
cotton. Check out Screenshot 2. The FT800 is almost
ready to go to work. Although an LCD panel is present
and attached, the FT800 does not yet have enough
information to use it. So, we’ll give the FT800 the
particulars it needs to drive the WQVGA LCD panel:
FT800 Editor from the FTDI site. The FT800 Editor will help
you get a tighter grip on the ways of the FT800 without
having to have any physical EVE hardware.
With that, I’ll leave you with Screenshot 3. NV
■ Screenshot 3. If you want to get a better handle on the
FT800 coordinate system and command set, download
this tool. It does not require actual EVE hardware and
runs on your PC.
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