energized and there are potentially
dangerous voltages across the
output terminals.
Start-up current flows through
R2 (and R4), turning on drive
transistor, Q1. As Q1 turns on, it
pulls pin 1 of T1 toward ground
which, in turn, causes the voltage
across the feedback winding of
T1/T1-L4 to rise from ground toward
+9V, since the turns ratio of the two
windings is 1:1. The rising voltage
across T1-L4 is conveyed to the base
of Q1 through C3, D1, and R3. This
current adds to the current through
R2, further turning on Q1 and
rapidly driving it into saturation.
In the saturated state, the
voltage across Q1 is a few tenths of
a volt and almost the full 9V battery
voltage is across T1-L1. Now, the
current through T1-L1 and R6 begins
to ramp up, storing magnetic energy
in the core. No current flows
through D3 since it’s reverse-biased
during this part of the oscillation cycle.
When the voltage drop across R6 rises above 0.7V,
the “choke” transistor, Q2, begins to turn on and shunt
the base current of Q1 to ground, forcing Q1 to come out
of saturation and the voltage at Q1’s collector to rise. This
action reduces the voltage across T1-L1, which
correspondingly drops the voltage across the feedback
winding, T1-L4, further reducing base drive to Q1 and
shutting Q1 off rapidly through this regenerative action.
When Q1 comes out of saturation and begins to shut
off, the voltage at its collector rises rapidly due to
inductive action, and the voltage across T1-L1 reverses,
driving Q1’s collector voltage above 9V. At the same time,
the secondary voltage reverses and D3 starts to conduct.
When the stored energy in the core is fully released
through the secondary, the voltages on all windings
collapse, turning on Q1 again via C1 (the voltage at pin
11 goes from a negative voltage toward ground). Then the
cycle repeats until C2 is charged to a voltage level where
the DUT begins to conduct, at which point the oscillation
stabilizes and continues to feed power into the DUT.
Steady-state oscillation waveforms are diagrammed in
Figure 2. Voltage levels (referenced to ground) are shown
for a generalized zener diode voltage, Vz, under test. The
voltages shown in parentheses are for a 12V zener diode
as the DUT, and corresponding actual circuit waveforms
are shown in Figure 3.
If no DUT is present when the circuit is operating,
then the voltage across C4 will continue to rise, as will the
peak voltage at the collector of Q1. The voltage at pin 2
of T1 and the output voltage would keep rising with each
cycle, as would the peak voltage (half the output voltage
plus 9V) at the collector of Q1. This is a feature of a
flyback circuit configuration, which allows zener diodes to
be tested well above the battery voltage of 9V.
However, some protection is necessary to keep the
peak voltage at Q1’s collector from exceeding its
maximum collector voltage rating of 40V. The series
combination of zener diode D2 and yellow LED2 provide
this protection by limiting the peak voltage and absorbing
the energy of T1’s magnetic field if no DUT is present, or
if the DUT breakdown voltage is greater than the tester’s
maximum output voltage. LED2 lights when there’s current
through D2 in this condition.
Figure 4 shows actual measurements of current and
power for various DUTs on the tester as constructed.
November 2014 27
■ FIGURE 4.
Measured
output power
and current.
■ FIGURE 3. Oscilloscope capture of actual circuit
testing a 12V zener.
