Nuts and Volts - March 2015

some voice messages.

Now, move the radio close to your oscillator and vary the oscillator frequency adjuster until you hear a beat tone as the oscillator frequency approaches and passes through the WWV carrier frequency. As you get very close to the WWV frequency, the beat tone will become inaudible, but you will hear the noise level change in amplitude as the oscillator goes in and out of phase with WWV. It will sound like swoosh ... swoosh ... swoosh.

If you are tuned to the 10 MHz and the swooshing sounds repeat once per second, then the oscillator is accurate within one part in 10,000,000. It’s not difficult to do five or ten times better.

Software

Off-loading the critical frequency counter functions to hardware makes the software control very straightforward. Basically, to make a frequency measurement, the software preloads the count registers to zero; the gate counter to the measurement period (.1 sec, 1 sec); the FREQ bit to one (to set the gate bank input to the 10 MHz reference and the count bank input to the input signal); and finally, the START bit is set to one.

After waiting for the measuring period to end, the software reads the count registers to get the frequency directly for a one second gate or frequency/10 for a .1 second gate. Making a period measurement follows a similar course, except the PERIOD bit is set to connect the gate bank input to the input signal and the count bank input to the 10 MHz reference. The key here is determining what value of input signal pulses to assign to the gate counter.

A HighRes measurement starts with the software making a sample .1 second frequency measurement. The measured frequency is multiplied by 10 to get the actual frequency. If the actual frequency is equal to or greater than 10 MHz, then the software goes on to make a higher accuracy one second frequency measurement. Otherwise, the software makes a period measurement by setting the gate counter equal to the actual frequency from the .1 second frequency measurement.

This means that the gate time will be close to one second and the count bank will reach close to 10,000,000, giving 7/8 digit accuracy. Note: We want the gate time to be about one second only to get the desired 7/8 digit accuracy. The frequency will be calculated using the number of 10 MHz pulses accumulated, and the count value preset into the gate counter.

For example, suppose the input frequency is exactly

992.150 Hz and the .1 second reading is 99. We multiply 99 by 10 to get 990, then this value (actually minus 990 minus 255) is set into the gate counter. The gate open time will be 990/992.150, or .9978329 seconds — close enough to the desired one second. The counter bank will end up at 9,978,329. We now calculate the actual frequency as 10,000,000/9,978329 X 990 = 992.150 Hz.

Note that the counter banks are only 24 bits long, giving a total count of 2^ 24 or a maximum count of 16,777,216. This is fine for the gate counter since its maximum count is about 10,000,000. However, for a high input frequency, the counter bank could exceed 60,000,000. I get around this by using a counter wrap-around property. When the count equals the maximum, it wraps around and starts again at zero. So, a 60,000,000 count will actually be 60,000,000 – 3 x 16,777,216 = 9,668,352. This begs the question of how do we know that the counter over-flowed three times. It’s simple. When I make the .1 second measurement, I divide by 1677721 and the number of counter wrap-arounds is the integer result – (integer) 6,000,000/167721 = 3.

Construction

The unit is built on three solderable prototype PCBs (printed circuit boards; Jameco part 2125034). One board (Figure 6) houses the input amplifier (Figure 4) and the PIC16F886 circuits (Figure 5). (An optional design is to mount the input amplifier in a separate shielded enclosure.) I isolated the five volt bus for the preamplifier by cutting the five volt etch between the input amplifier and the PIC. I then bridged the cut with a 1 µHenry choke. A second board (Figure 7) contains a counter bank (Figure 2) and the gate synchronizer (Figure 3). The third board (Figure 5 without U6) contains just a counter bank (Figure 2).