megohm resistor decreases the output of the LM6181 by
0.020 volts or one half bit. So, to get 5. 3 volts, we set the
PIC output to the next integer value of 133 ( 5. 32 volts)
and set HALFSTEP which reduces the voltage by 0.020
volts; we then get 5. 32 – 0.020 = 5.30 volts. This works
for all voltages with an odd fractional part.
The upper left of Figure 2 shows the input reference
diodes and buffer amplifier. I use the PIC built-in analog-to-digital converter (ADC) to measure various voltage points
in the tester. This ADC requires a fixed voltage reference
of no more than 5. 5 volts, but the VVR mode requires a
10 volt reference. The five volts for the ADC reference can
be divided down from a 10 volt reference diode with two
precision resistors or — for best accuracy — I use two five
volt reference diodes in series (as shown in Figure 2) and
pick up the ADC reference voltage from the bottom diode
D1. In fact, the upper diode D2 doesn’t need to be as
accurate as D1 since the calibration potentiometer (R5)
will be used to correct any error.
Front panel potentiometer (R2) sets the peak-to-peak
output in the PFG mode. Resistors R3 and R4 divide this
voltage in half for the PIC ADC, which reads and displays
the peak-to-peak voltage in the PFG mode. Potentiometer
R5 is internally mounted and is used in the calibration of
The VVR mode is selected when the PIC sets the
VVRMode bit. Two things happen: First, the double pole
relay K1 is energized and contact K1a bypasses
potentiometer R2, connecting the full 10 volts to amplifier
U5; and contact K1b grounds the plus input of the LM
6181 (U7) setting unipolar operation. Second, R9 raises
the 10 volts applied to the DAC0800 by about 2% so that
250 steps yields 10 volts in the VVR mode and 255 steps
yields 10 volts in the PFG mode.
Front panel switches SW2 and SW3 set the VVR
voltage. SW2 is a single pole 11-position switch that
selects the integer voltage: 0, 1, 2 ... 10 volts. SW3 is a
single pole 10-position switch that selects the fractional
voltage: 0, .1, . 2, . 3 ... . 9 volts.
Calibration of the VVR/PFG does not require any
external equipment because of the accuracy of the PIC
ADC coupled with the accurate five volt reference diode
D1. Just follow these steps:
1. Set the VVRMode bit and clear the HALFSTEP bit.
2. Set SW2 to zero volts and SW3 to . 2 volts.
3. Adjust the ZERO ADJ, internal potentiometer R12,
until the display reads 0.2 volts.
4. Set SW2 to 10 volts and SW3 to zero volts.
5. Adjust the AMPLITUDE ADJ, internal potentiometer
R5, until the display reads 10 volts.
6. Repeat steps 2 through 6 a few times.
I’m going to use a sine wave function to demonstrate
the operation of the PFG. If you look at a sine wave, you
will see that a complete cycle
consists of four distinct quadrants
that have a similar shape. For
example, if we want our sine wave
to have the full eight-bit capacity
of the DAC (128 plus and 128
minus amplitude steps) for a
complete sine wave cycle, then
we must also have 256 time steps
(one for each amplitude step). The
256 amplitude steps for each
complete sine wave cycle
correspond to 64 amplitude steps
for each of the four quadrants of
the sine wave. So, in order to
generate a 20 kHz sine wave at 64
step resolution, the PIC must send
256 x 20,000 or 5,120,000 update
steps to the DAC per second.
The PIC18F452 that I chose
for this project has a PLL that
multiplies the input ( 10 MHz) by
four to 40 MHz, but the
instruction rate is one quarter of
that or 10 MHz. This means the
updates can’t take more than four
30 November 2016
■ FIGURE 3. RAM and RAM